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LSI/CSI
UL
(R)
LS7538-LS7539
(631) 271-0400 FAX (631) 271-0405
LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747
A3800
TOUCH CONTROL STEP DIMMER LIGHT SWITCH WITH AUTOMATIC GAIN CONTROL (AGC) December 2002
FEATURES:
* * * * * * * * * * * Touch Sensitivity guaranteed to 600pF Touch Plate Capacitance. Touch Operation independent of line plug polarity. Pin selection of three available Brightness Step Sequences. Minimal external components. AGC Loop stabilizes immediately after Power-Up. Brightness state is Off after AC power applied. Brightness state is unchanged if AC power interrupted for < 0.5 sec. Advanced CMOS design for reliable operating characteristics and low power. 50/60 Hz Line Frequency. +6V to +9.5V Operation (VDD-VSS). LS7538, LS7539 (DIP); LS7538-S, LS7539-S (SOIC) - See Figure 1 PIN ASSIGNMENT TOP VIEW
CLOCK 1
2
8
TRIG
LSI
LS7538/7539
SYNC
7
V SS(-V)
VDD(+V )
3
6
MODE
APPLICATIONS: * Screw-in and built-in adapter modules for converting table and floor lamps to touch control for step dimming. * On-Off touch control of under-cabinet fluorescent lamps (LS7539 only).
TOUCH
4
5
CONTROL
FIGURE 1
DESCRIPTION:
The LS7538 and LS7539 are CMOS integrated circuits which provide trigger pulses for triac phase control of incandescent lamps. The circuits are designed to operate with a wide variety of lamp sizes ranging from small table lamps to large floor lamps. The AGC Loop automatically adjusts Touch Sensitivity to be independent of lamp size. There are 3 different Brightness Step Sequences for each version of the IC which can be selected by the Three-State MODE pin as shown in Table 1. TABLE 1. BRIGHTNESS STEP MODES MODE PIN FLOAT VDD Vss (LS7538) (LS7539) BRIGHTNESS STEP SEQUENCE OFF-NIGHT LIGHT-MEDIUM-MAXIMUM-OFF OFF-NIGHT LIGHT- LOW MEDIUM-HIGH MEDIUM-MAXIMUM-OFF OFF-MAXIMUM-MEDIUM-NIGHT LIGHT-OFF OFF-MAXIMUM-OFF
The lamp brightness is made to vary by changing the delay of the TRIG pulse to the triac from the zero-crossing of the SYNC input. The delays are shown in Table 2 for 50Hz and 60Hz operation along with Delivered Power as a percentage of Full Power. Figure 2 illustrates the delay. TABLE 2. BRIGHTNESS POWER LEVELS Brightness Night Light Low Medium Medium High Medium Maximum 60Hz Delay (1) 6.0 ms 4.8 ms 4.0 ms 3.2 ms 0.85 ms 50Hz Delay (2) 7.2 ms 5.7 ms 4.8 ms 3.8 ms 1.0 ms % PWR (3) 12 35 53 72 99
(1) With 300k connected between Pin 1 and VDD. (2) With 360k connected between Pin 1 and VDD. (3) Percentage of Full Power delivered to a resistive load by the Triac Switch.
7538/39-120202-1
FIGURE 2. OUTPUT DELAY (Td)
SYNC (Pin 2)
TRIG(Pin 8)
Td
Td
INPUT/OUTPUT DESCRIPTION: CLOCK Input (Pin 1) An external resistor connected between this input and VDD, along with an internal capacitor and oscillator stage, generates a clock which is used for all timing functions. The recommended value of this resistor for 50Hz and 60Hz operation is specified in the ELECTRICAL CHARACTERISTICS. The resistor value determines the Brightness Levels produced. (See Table 2) SYNC Input (Pin 2) 50 or 60Hz AC input for zero crossing detection. VDD (Pin 3) Supply voltage positive terminal. TOUCH Input (Pin 4) Input for sensing that a touch has been made on a lamp surface or other touch plate. CONTROL I/O (Pin 5) An external R-C network connected between this pin and VDD establishes the controlling feedback for the AGC Loop. MODE Input (Pin 6) A three-state input used to select the desired Brightness Step Sequence (See Table 1). The MODE Input may be changed during operation. VSS (Pin 7) Supply voltage negative terminal. TRIG (Pin 8) The TRIG output produces a negative going pulse every half-cycle of the SYNC input to trigger the triac. The delay, Td, of the pulse with respect to the SYNC signal determines the Brightness Level produced. (See Table 2 & Figure 2)
ABSOLUTE MAXIMUM RATINGS: PARAMETER DC supply voltage Any input voltage Operating temperature Storage temperature SYMBOL VDD - VSS VIN TA TSTG VALUE +11 VSS - 0.5 to VDD + 0.5 -20 to +85 -65 to +150 UNIT V V C C
The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use.
7538/39-041597-2
ELECTRICAL CHARACTERISTICS: ( All voltages referenced to Vss. TA = +25C unless otherwise specified.) PARAMETER Supply Voltage Supply Current SYMBOL VDD IDD MIN +6 TYP MAX +9.5 1.5 UNIT V mA CONDITIONS Output off, VDD = +8.0V VDD = +8.0V
TRIG Sink Current Vo = VDD - V TRIG Source Current Vo = VDD - 0.2V TRIG Pulse Width
IO
-50
-
-
mA
IO
+0.1
-
-
mA
VDD = +8.0V
TW Td
-
90 110 4.0 4.8 300 360 10 1 -
600
s s ms ms k k M F pF
RC = 300k, 60Hz RC = 360k, 50Hz Rc = 300k, 60Hz Rc = 360k, 50Hz 60Hz 50Hz -
TRIG Pulse Delay (Medium Brightness) CLOCK Resistor
RC CL
CONTROL Resistor Capacitor Touch Plate Capacitance
MODE
6 ZERO-CROSS DETECTOR
SYNC
2
CLOCK
1
OSCILLATOR
COUNTER
DECODER
OUTPUT DRIVER
8 TRIG
TOUCH
4
AGC CIRCUIT
STEPPER
CONTROL
5
V DD V SS
3 7
+V -V
FIGURE 3 LS7538/LS7539 BLOCK DIAGRAM
7538/39-041197-3
FIGURE 4. TOUCH LAMP APPLICATION SCHEMATIC
+V
R1 D1 LOAD MT2 T1 MT1 G R5
+
AC MAINS Z1 C1
-
+ C6
-V
C5 C2 8 TRIG 7 V SS
(SEE NOTE 1)
6
5 C7* (SEE NOTE 2)
MODE CONT
LS7538
CLOCK SYNC V DD TOUCH R2 1 R4 2 3 4 D2 D3
TOUCH PLATE (LAMP BODY)
R3 C3 C4
115VAC APPLICATION R1 R2 R3 (1) R4 R5 C1 C2 C3 = = = = = = = = 20k, 1W 470k, 1/4W 1k, 1/4W 300k, 1/4W, 1% 10M, 1/4W 47F, 16V 1000pF, 16V 1000pF, 1kV C4 C5 C6 Z1 D1 D2 D3 T1 = = = = = = = = or 1000pF, 1kV .03F, 16V 1F, 16V 8.2V, 1/4W Zener 1N4004 1N4148 1N4148 Q2004L4 (Typical Triac) Q2004F41 (Typical Triac) R1 R2 (1) R4 D1 T1
220VAC APPLICATION = = = = = or 39k, 2W 910k, 1/4W 360k, 1/4W, 1% 1N4005 Q4004L4 (Typical Triac) Q4004F41 (Typical Triac)
All other values remain the same.
(1) Resistor should be placed adjacent to Pin 1.
NOTE 1: Connect MODE (Pin 6) for desired Brightness Step Sequence (See Table 1). NOTE 2: A good PCB layout using through-hole components will provide protection for ESD introduced at the Touch Plate in the range of 25kV. Using surface mount components and/or a poor PCB layout can reduce the ESD protection. The OEM can increase the ESD protection provided by the product with any combination of the following steps: Step 1: The most effective and least costly way to increase ESD protection is to create a spark gap around the Touch Plate input on the PCB. This will increase ESD protection on a good PCB layout to abut 35kV. The gap should be made with a split metal ring with each side of the metal ring connected back to opposite sides of the AC line. This ensures that a path for the spark back to house ground through AC Neutral exists independent of line plug polarity. The split ring and the center conduction plate should be constructed so that the spacing between them conforms to UL requirements. The spark gap will absorb most of the ESD leaving a remnant of about 10kV for the rest of the circuit to absorb. Step 2: Increase R3 from 1k to 5.1k and add C7, a 0.1F capacitor, between VDD and Vss. (A minimal loss in touch sensitivity may be experienced.) Step 3: Replace diodes D2 and D3 (1N4148) with Schottky diodes (1N5819 or similar)
7538/39-091100-4

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